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1 change: 1 addition & 0 deletions flow/designs/asap7/aes-block/block.mk
Original file line number Diff line number Diff line change
Expand Up @@ -15,4 +15,5 @@ export MAX_ROUTING_LAYER ?= M5
export PLACE_PINS_ARGS = -annealing

export PDN_TCL = $(PLATFORM_DIR)/openRoad/pdn/BLOCK_grid_strategy.tcl
export REMOVE_CELLS_FOR_LEC = TAPCELL*

1 change: 1 addition & 0 deletions flow/designs/asap7/aes-block/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -30,3 +30,4 @@ export PWR_NETS_VOLTAGES =
export MACRO_PLACE_HALO ?= 3 3

export ROUTING_LAYER_ADJUSTMENT = 0.3
export REMOVE_CELLS_FOR_LEC = TAPCELL*
2 changes: 2 additions & 0 deletions flow/designs/asap7/aes-mbff/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -16,3 +16,5 @@ export TNS_END_PERCENT = 100

export CLUSTER_FLOPS = 1
export ENABLE_DPO = 0

export REMOVE_CELLS_FOR_LEC = TAPCELL*
2 changes: 1 addition & 1 deletion flow/designs/asap7/aes/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@ export PLACE_DENSITY = 0.65
export TNS_END_PERCENT = 100
export EQUIVALENCE_CHECK ?= 1
export REMOVE_CELLS_FOR_EQY = TAPCELL*
export REMOVE_CELLS_FOR_LEC = TAPCELL*

ifeq ($(FLOW_VARIANT),top)
export DESIGN_NAME = aes_cipher_top
Expand All @@ -30,4 +31,3 @@ else ifeq ($(FLOW_VARIANT),combine)
$(WORK_HOME)/results/$(PLATFORM)/$(DESIGN_NICKNAME)/blackbox/1_synth.v
endif

export LEC_CHECK = 1
3 changes: 3 additions & 0 deletions flow/designs/asap7/aes_lvt/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -17,3 +17,6 @@ export TNS_END_PERCENT = 100
export ASAP7_USE_VT = LVT

export RECOVER_POWER = 100

export REMOVE_CELLS_FOR_LEC = TAPCELL*

2 changes: 2 additions & 0 deletions flow/designs/asap7/cva6/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -108,3 +108,5 @@ export CTS_LIB_NAME = asap7sc7p5t_INVBUF_SLVT_FF_nldm_211120

# Remove rvfi_probes_o interface
export SYNTH_CANONICALIZE_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/canonicalize.tcl

export REMOVE_CELLS_FOR_LEC = TAPCELL*
2 changes: 2 additions & 0 deletions flow/designs/asap7/ethmac/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -10,3 +10,5 @@ export CORE_UTILIZATION = 70
export CORE_ASPECT_RATIO = 1
export CORE_MARGIN = 2
export PLACE_DENSITY = 0.75

export REMOVE_CELLS_FOR_LEC = TAPCELL*
2 changes: 2 additions & 0 deletions flow/designs/asap7/ethmac_lvt/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -15,3 +15,5 @@ export PLACE_DENSITY = 0.60
export ASAP7_USE_VT = LVT

export RECOVER_POWER = 1

export REMOVE_CELLS_FOR_LEC = TAPCELL*
2 changes: 2 additions & 0 deletions flow/designs/asap7/gcd-ccs/config.mk
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
export DESIGN_NICKNAME = gcd-ccs
export LIB_MODEL = CCS
include designs/asap7/gcd/config.mk

export REMOVE_CELLS_FOR_LEC = TAPCELL*
2 changes: 2 additions & 0 deletions flow/designs/asap7/gcd/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -14,3 +14,5 @@ export PLACE_DENSITY = 0.35
# a smoketest for this option, there are a
# few last gasp iterations
export SKIP_LAST_GASP ?= 1

export REMOVE_CELLS_FOR_LEC = TAPCELL*
3 changes: 3 additions & 0 deletions flow/designs/asap7/ibex/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -30,3 +30,6 @@ export TNS_END_PERCENT = 100

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export DISABLE_LEC_CHECK = 1

5 changes: 4 additions & 1 deletion flow/designs/asap7/jpeg/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -15,4 +15,7 @@ export PLACE_DENSITY = 0.75

export TNS_END_PERCENT = 100
export EQUIVALENCE_CHECK ?= 1
export REMOVE_CELLS_FOR_EQY = TAPCELL*
export REMOVE_CELLS_FOR_LEC = TAPCELL*

export DISABLE_LEC_CHECK = 1

2 changes: 1 addition & 1 deletion flow/designs/asap7/jpeg_lvt/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -18,4 +18,4 @@ export RECOVER_POWER = 100

export ASAP7_USE_VT = LVT


export REMOVE_CELLS_FOR_LEC = TAPCELL*
3 changes: 3 additions & 0 deletions flow/designs/asap7/mock-alu/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -10,3 +10,6 @@ export ROUTING_LAYER_ADJUSTMENT = 0.45

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export DISABLE_LEC_CHECK = 1

2 changes: 2 additions & 0 deletions flow/designs/asap7/mock-cpu/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -13,3 +13,5 @@ export PLACE_DENSITY = 0.71
export TNS_END_PERCENT = 100

export IO_CONSTRAINTS = designs/asap7/mock-cpu/io.tcl

export REMOVE_CELLS_FOR_LEC = TAPCELL*
2 changes: 2 additions & 0 deletions flow/designs/asap7/riscv32i-mock-sram/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -2,3 +2,5 @@ export DESIGN_NICKNAME = riscv32i-mock-sram
export BLOCKS=fakeram7_256x32

include designs/asap7/riscv32i/config.mk

export REMOVE_CELLS_FOR_LEC = TAPCELL*
Original file line number Diff line number Diff line change
Expand Up @@ -17,3 +17,5 @@ export PLACE_PINS_ARGS = -min_distance 6 -min_distance_in_tracks
export IO_CONSTRAINTS = $(DESIGN_HOME)/asap7/riscv32i-mock-sram/fakeram7_256x32/io.tcl

export PDN_TCL = $(PLATFORM_DIR)/openRoad/pdn/BLOCK_grid_strategy.tcl

export REMOVE_CELLS_FOR_LEC = TAPCELL*
2 changes: 2 additions & 0 deletions flow/designs/asap7/riscv32i/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -29,3 +29,5 @@ export CTS_CLUSTER_DIAMETER = 50

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export REMOVE_CELLS_FOR_LEC = TAPCELL*
3 changes: 3 additions & 0 deletions flow/designs/asap7/swerv_wrapper/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -61,3 +61,6 @@ export ROUTING_LAYER_ADJUSTMENT = 0.2

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export DISABLE_LEC_CHECK = 1

2 changes: 1 addition & 1 deletion flow/designs/asap7/uart/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ export CORE_AREA = 1.08 1.08 16 16
export TNS_END_PERCENT = 100
export EQUIVALENCE_CHECK ?= 1
export REMOVE_CELLS_FOR_EQY = TAPCELL*
export REMOVE_CELLS_FOR_LEC = TAPCELL*
export SKIP_GATE_CLONING = 1
export VERILOG_TOP_PARAMS = DATA_WIDTH 8
export SYNTH_HDL_FRONTEND = slang
export LEC_CHECK = 1
3 changes: 3 additions & 0 deletions flow/designs/gf180/ibex/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -17,3 +17,6 @@ export PLACE_DENSITY_LB_ADDON = 0.1

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export DISABLE_LEC_CHECK = 1

3 changes: 3 additions & 0 deletions flow/designs/gf180/uart-blocks/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -22,3 +22,6 @@ export PLACE_DENSITY = 0.60
export TAPCELL_TCL ?= $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/tapcell.tcl
export MACRO_ROWS_HALO_X = 14
export MACRO_ROWS_HALO_Y = 14

export DISABLE_LEC_CHECK = 1

3 changes: 3 additions & 0 deletions flow/designs/ihp-sg13g2/ibex/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -22,3 +22,6 @@ export CTS_BUF_DISTANCE = 60

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export DISABLE_LEC_CHECK = 1

3 changes: 3 additions & 0 deletions flow/designs/nangate45/bp_multi_top/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -35,3 +35,6 @@ export SKIP_GATE_CLONING = 1

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export DISABLE_LEC_CHECK = 1

2 changes: 2 additions & 0 deletions flow/designs/sky130hd/aes/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -23,3 +23,5 @@ export CTS_CLUSTER_DIAMETER = 50

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hd__tapvpwrvgnd*
1 change: 1 addition & 0 deletions flow/designs/sky130hd/chameleon/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -50,4 +50,5 @@ export FP_PDN_RAIL_WIDTH = 0.48
export FP_PDN_RAIL_OFFSET = 0
export TNS_END_PERCENT = 100

export DISABLE_LEC_CHECK = 1

2 changes: 1 addition & 1 deletion flow/designs/sky130hd/gcd/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -11,4 +11,4 @@ export CORE_UTILIZATION = 40
export TNS_END_PERCENT = 100
export EQUIVALENCE_CHECK ?= 1
export REMOVE_CELLS_FOR_EQY = sky130_fd_sc_hd__tapvpwrvgnd*
export LEC_CHECK = 1
export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hd__tapvpwrvgnd*
4 changes: 4 additions & 0 deletions flow/designs/sky130hd/ibex/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -28,3 +28,7 @@ export CTS_CLUSTER_DIAMETER = 50

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hs__tapvpwrvgnd*

export DISABLE_LEC_CHECK = 1
2 changes: 2 additions & 0 deletions flow/designs/sky130hd/jpeg/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -13,3 +13,5 @@ export TNS_END_PERCENT = 100
export FASTROUTE_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/fastroute.tcl

export REMOVE_ABC_BUFFERS = 1

export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hd__tapvpwrvgnd*
2 changes: 2 additions & 0 deletions flow/designs/sky130hd/microwatt/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -51,3 +51,5 @@ endif

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export DISABLE_LEC_CHECK = 1
2 changes: 2 additions & 0 deletions flow/designs/sky130hd/riscv32i/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -12,3 +12,5 @@ export REMOVE_ABC_BUFFERS = 1

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hd__tapvpwrvgnd*
2 changes: 2 additions & 0 deletions flow/designs/sky130hs/aes/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -19,3 +19,5 @@ export CTS_CLUSTER_DIAMETER = 50

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hs__tapvpwrvgnd*
2 changes: 1 addition & 1 deletion flow/designs/sky130hs/gcd/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ export PLACE_DENSITY_LB_ADDON = 0.1
export TNS_END_PERCENT = 100
export EQUIVALENCE_CHECK ?= 1
export REMOVE_CELLS_FOR_EQY = sky130_fd_sc_hs__tapvpwrvgnd*
export LEC_CHECK = 1
export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hs__tapvpwrvgnd*

#export SYNTH_HDL_FRONTEND ?= slang
#export OPENROAD_HIERARCHICAL ?= 1
2 changes: 2 additions & 0 deletions flow/designs/sky130hs/ibex/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -17,3 +17,5 @@ export PLACE_DENSITY_LB_ADDON = 0.2
export TNS_END_PERCENT = 100

export REMOVE_ABC_BUFFERS = 1

export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hs__tapvpwrvgnd*
2 changes: 2 additions & 0 deletions flow/designs/sky130hs/jpeg/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -19,3 +19,5 @@ export CTS_CLUSTER_DIAMETER = 50

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hs__tapvpwrvgnd*
2 changes: 2 additions & 0 deletions flow/designs/sky130hs/riscv32i/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -17,3 +17,5 @@ export REMOVE_ABC_BUFFERS = 1

export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1

export REMOVE_CELLS_FOR_LEC = sky130_fd_sc_hs__tapvpwrvgnd*
4 changes: 2 additions & 2 deletions flow/scripts/cts.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -61,7 +61,7 @@ if { !$::env(SKIP_CTS_REPAIR_TIMING) } {
if { $::env(EQUIVALENCE_CHECK) } {
write_eqy_verilog 4_before_rsz.v
}
if { [env_var_exists_and_non_empty LEC_CHECK] } {
if { ![env_var_exists_and_non_empty DISABLE_LEC_CHECK] } {
write_lec_verilog 4_before_rsz_lec.v
}

Expand All @@ -70,7 +70,7 @@ if { !$::env(SKIP_CTS_REPAIR_TIMING) } {
if { $::env(EQUIVALENCE_CHECK) } {
run_equivalence_test
}
if { [env_var_exists_and_non_empty LEC_CHECK] } {
if { ![env_var_exists_and_non_empty DISABLE_LEC_CHECK] } {
write_lec_verilog 4_after_rsz_lec.v
run_lec_test 4_rsz 4_before_rsz_lec.v 4_after_rsz_lec.v
}
Expand Down
4 changes: 2 additions & 2 deletions flow/scripts/lec_check.tcl
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
proc write_lec_verilog { filename } {
if { [env_var_exists_and_non_empty REMOVE_CELLS_FOR_EQY] } {
write_verilog -remove_cells $::env(REMOVE_CELLS_FOR_EQY) $::env(RESULTS_DIR)/$filename
if { [env_var_exists_and_non_empty REMOVE_CELLS_FOR_LEC] } {
write_verilog -remove_cells $::env(REMOVE_CELLS_FOR_LEC) $::env(RESULTS_DIR)/$filename
} else {
write_verilog $::env(RESULTS_DIR)/$filename
}
Expand Down
2 changes: 1 addition & 1 deletion tools/kepler-formal